Circuitry to implement DC:DC converters is known in the art. Such circuits receive an input-side DC voltage that is sampled or chopped and transformer-coupled to an output side. On the output side, the waveform is rectified and filtered to provide a regulated output voltage that may be greater than or less than the input voltage. Feedback from output to input can be used to regulate the sampling duty cycle or frequency to provide an acceptably efficient DC:DC converter in a small form factor.
FIG. 1A depicts a so-called voltage-fed push-pull DC:DC converter 10, according to the prior art, has having an input or primary side 20 and an output or secondary side 30. In input and output sides are essentially demarked by a transformer T1 having input windings W1, W2, and output windings W3-1 ,W3-2 and W4-1,W4-2. Preferably windings W1 and W2 are identical and center tapped windings W3-1,W3-2,W4-1,W4-2 are identical.
The input side 20 of the converter is coupled to a source of DC potential Vin that in some applications may be pre-regulated with a pre-regulator 40 whose output potential is controlled within a known tolerance. In other applications, preregulation is omitted and feedback 50 is used to modulate pulse width on drive signals output from a control circuit 60, to regulate the output voltage(s), shown here as V01, V02.
In FIG. 1A, input voltage, which may be the output potential from pre-regulator 30, is sampled or chopped using push-pull switching transistors Q1, Q2 and respective transformer T1 primary windings W1, W2. Control circuit 50 provides complementary drive signals to the input leads of Q1, Q2 such that when Q1 is on, Q2 is off, and vice versa. Although Q1 and Q2 are shown as switching an end of primary windings W1, W2 to ground potential, it is understood that ground potential implies a stable potential. Stated differently, if desired a potential other than 0 V DC might instead be switchably coupled to an end of primary windings W1 and W2. This understanding that ground is simply a convenient reference potential shall apply throughout this disclosure.
On the converter output side 30, center-tapped secondaries W3-1, W3-2, and W4-1, W4-2 of transformer T1 step-up or step-down the chopped waveforms, which are rectified by diodes D1, D2 and inductor L1-capacitor C1, and by diodes D3, D4 and inductor L2-capacitor C2. As described below, in an attempt to reduce voltage stress on the output side rectifier components and to reduce EMI it is customary to insert snubbers, typically a series-coupled resistor-capacitor, across each output winding of T1.
Feedback loop 50 can sample the DC output voltages, here shown as Vo1, Vo2, to control the pulse width (or duty cycle) and/or frequency of the Q1, Q2 drive signals generated by control circuit 60. The secondary windings may output different magnitudes Vo1, Vo2 and the number of windings may be greater or less than two.
As will be described in detail shortly, there are several recognized drawbacks with the configuration of FIG. 1A, including difficulty in implementing transformer T1, under utilization of the secondary transformer windings, the essentially unbalanced state of the magnetic flux in the transformer, and the need to employ snubbers to help protect against voltage stress and reduce EMI, at the cost of conversion efficiency. A further drawback to the configuration of FIG. 1A is the necessity to ensure that Q1 and Q2 are never simultaneously in the on-state, a condition that could result in potentially destructive inrush current levels. High current transients during any overlap between transition states of Q1, Q2 gives rise to high magnitude of electromagnetic (EMI) radiation, which can require expensive shielding of the DC:DC converter. Ensuring that Q1 and Q2 are not simultaneously on can add to the complexity of control circuit 60.
In the push-pull configuration of FIG. 1A (and indeed FIG. 1B as well) careful flux matching is required for transformer T1, especially balancing between windings W1 and W2 and switches Q1, Q1. On the output side, each of D1 and D2, and D3 and D4 deliver the same amount of energy to their respective loads (not shown). This in turn dictates good symmetry between center-tapped windings W3-1 and W3-2, and W4-1 and W4-2. Such symmetry can prevent or at least greatly reduce the presence of harmonic energy at half the switching frequency of Q1 or Q2. Understandably, implementing a well designed voltage-fed pushpull DC:DC converter can be challenging.
Fabricating a perfectly symmetrical transformer T1 is difficult in practice. But even if the T1 windings are perfectly balanced, the secondary windings are never fully utilized in the sense that these windings do not conduct current all of the time. For example, if D1 is conducting, winding W3-1 is used (e.g., conducts current), but during this time diode D2 is not conducting and winding W3-2 is not used. By the same token, if D2 is conducting, winding W3-2 is used, but winding W3-1 conducts no current and is not used. (The same statements hold true for windings W4-1, W4-2, if they are present).
This under utilization of the secondary transformer windings presents several problems. During the time a secondary transformer winding is not being used, the winding portion coupled to the associated (reverse-biased) diode is essentially floating, e.g., not clamped to a low impedance. As a result voltage spikes can be generated, which give rise to overshoot and undershoot ringing and EMI, which can be unacceptable in many applications. Further, the voltage spikes can overstress the rectifier diode, inductor, and output capacitors, requiring higher voltage breakdown components to be used, thus increasing cost and perhaps size of the circuitry.
Those skilled in the art will appreciate that coupling an R-C snubber across the transformer secondary windings presents a lower AC-impedance that can dampen the magnitude of otherwise dangerous voltage spikes, thus reducing EMI. Unfortunately, the snubbers dissipates inductance leakage energy, and can reduce DC:DC conversion by up to 5% or so. However where EMI and over-voltage stress present critical constraints, prior art configuration 1A will require snubbers. In some instances, it may even be necessary to reduce switching speed in prior art converters in an attempt to control voltage stress and EMI generation. If the snubbers were eliminated, conversion efficiency would increase by several percent but the magnitude of the overshoot/undershoot could be 100% of the voltage level being switched. Thus if Vo1 were 50 VDC, capacitor C1 would have to be rated at at least 100 VDC breakdown. If it were somehow possible to more fully or more efficiently utilize transformer 40, it might be possible to use a smaller transformer, e.g., a lighter and less expensive transformer.
FIG. 1B depicts a so-called current-input topology for a push-pull DC:DC converter system 80. Components similarly numbered as in FIG. 1A may generally be the same as those described with respect to converter system 10. In this configuration, Vin (which may be pre-regulated) is switched via Qo (under command of control circuit 90) to lowpass filter Lo-Co. The filtered Vin is then switchingly coupled to T1 primary windings W1, W2 by switches Q1, Q2 under command of control circuit 90. Since input switch Qo is sometimes open, a diode Do is included to ensure a current path for Lo when Qo is open. In the configuration of FIG. 1B, drive signals to 01 and Q2 are never on simultaneously.
A current-fed push-pull topology such as shown in FIG. 1B can offer advantages over the voltage-fed push-pull topology of FIG. 1A. In a current-fed push-pull topology the transformer symmetry constraints are somewhat eased because input current is stored and somewhat averaged by inductor Lo, which can reduce the AC component in this current. In general, current-fed topology tends to reduce ripple in the output voltages Vo1, Vo2. Further, current-fed topologies typically utilize overlapping drive signals to switches Q1, Q2, as simultaneously on-switches cannot directly draw excessive inrush currents from pre-regulator 30 or the Vin power source. Nonetheless, even the current-fed topology of FIG. 1B can require snubbers, and suffers from the same under utilization of the T1 secondary windings.
Thus, there is a need for a DC: DC converter topology that, on the input-side, can provide the advantages of current-fed topology. On the output-side, preferably such a topology should improve transformer efficiency and utilization. Without requiring snubbers, the overall topology should reduce EMI and voltage stress, improve operating efficiency and performance, yet be realizable using a less expensive and smaller transformer. Further, output side topology should provide a bonus output voltage that preferably is about half of the main output voltage.
The present invention provides such a DC:DC converter topology.